Clocking / Physical Design Engineer

About This Role

• Do Something Wonderful! At Intel, we create world‑changing technology that improves the lives of people around the globe.
• As a Clocking / Physical Design Engineer , you will join a high‑performing engineering team responsible for clocking architecture, clock distribution networks, and physical design for Intel’s flagship CPU cores on advanced process nodes.
• What You Will Do In this role, you will perform a variety of engineering tasks, including but not limited to: Support physical design implementation of CPU designs from RTL through GDS Participate in synthesis, place and route, floorplanning, and clock tree synthesis Perform static timing analysis and support timing closure activities Assist with power, clock distribution, reliability, and power integrity analysis Support physical design verification and signoff activities such as layout verification and electrical rule checking Analyze design results and collaborate with logic, circuit, architecture, and design automation teams Contribute to improvements in physical design flows, methodologies, and automation Work with EDA tools and scripting languages to support design and workflow efficiency Behavioral traits that we are looking for: Demonstrates reliability in meeting engineering milestones and commitments Maintains focus on accuracy, reproducibility, and design quality Applies problem‑solving skills to debug and resolve design issues Adapts to new technical challenges and changing project needs Contributes positively to a collaborative and inclusive team environment Qualifications: You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position.
• Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
• Qualifications could be obtained through a combination of schoolwork, classes, research, and/or relevant previous job and/or internship experiences.
• Minimum qualifications and experience that will get you noticed: The ideal candidate must have a Bachelor’s Degree in Electrical Engineering, Computer Engineering related STEM field with 3+ years of experience.
• Or Master’s degree in the same fields and 1+ year of relevant experience.
• Your experience listed above must be in the following; Backend design and/or integration on leading edge process nodes Perl, TCL, or other industry-standard scripting languages High frequency clock distribution design and implementation, custom circuits and clock tree synthesis.
• Preferred qualifications and experience that will make you stand out: Experience with computer architecture Experience with IA-32 assembly and/or Verilog programming experience Experience with validation or testing experience, especially in a silicon design team Job Type: College Grad Shift: Shift 1 (United States of America) Primary Location: US, Texas, Austin Additional Locations: Business group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.
• It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel .
• Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
• Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
• Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.