Chassis IP Design Engineer

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About This Role

  • Intel is seeking an experienced Logic Design engineer for the Intel Chassis Group, which is chartered to deliver the chassis for SoCs within Intel.
  • The role involves logic design of component and foundation IPs which can be used to build an SoC chassis.
  • These high-performance data plane and control plane routers, switches, arbiters, protocol conversion bridges, debug/trace components, and clock and power controls.
  • The ideal candidate will have strong design and Verilog skills and some background in protocol conversion bridges for AMBA/CXL protocols.
  • Understanding of concepts such as QoS, access control, flow control, debug, RAS, security and error handling is a plus.

Nice to Have

  • 4+ Experience in Verilog/SystemVerilog, Lint/CDC/RDC and design of IP subsystems • Familiarity with AMBA (CHI, AXI, AHB, APB) and PCIe/CXL protocols • Experience in working with architecture, verification SoC integration teams • Good understanding of PPA trade-offs • Ability to work with physical design to solve timing issues • Experience with use of AI to assist logic design is a plus In addition to the qualifications a successful candidate will demonstrate: • Communication skills • Capacity to work across large, geographically distributed engineering teams across multiple time zones.

Tools & Skills

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Intel

India, Bangalore

Specialisation
Open roles at Intel
97 positions
Job ID
/job/India-Bangalore/Chassis-IP-Design-Engineer_JR0282240-1

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