Opens intel.wd1.myworkdayjobs.com in a new tab
About This Role
- The Role and Impact As a Layout Design Engineer, you will play a critical role in the physical implementation of next-generation high-performance Intel Atom microprocessors.
- Your day-to-day responsibilities will include driving the design of memory compilers, custom IPs, and partitions that support CPU products.
- Your contributions will directly impact the efficiency and performance of Intel's cutting-edge technologies used globally.
- Business Group You will join Intel Corporation's ATOM GDC Physical Design organization, which focuses on delivering innovative and efficient physical design solutions for Intel Atom microprocessors.
- This group supports Intel's broader mission to create world-class semiconductor products that empower cutting-edge computing technologies.
- Responsibilities will include but are not limited to: Perform and drive complex physical design assignments independently, ensuring best practices and high efficiency.
- Collaborate closely with circuit design engineers to interpret schematics and enable successful physical implementation.
- Lead physical design efforts ranging from leaf-level cell design to full partition integration.
- Assess and implement solutions for custom IPs and memory compilers to support high-performance CPU products.
- Develop and optimize layout scripts, macros, and tools to enhance design implementation workflows.
- Work collaboratively with cross-functional teams across various Intel sites to align on design objectives.
- The ideal candidate should show the following behavioral traits: Good English communication skills.
Requirements
- are required to be initially considered for this position .
- Bachelor's degree in Electronics, Microelectronics Engineering, Computer Engineering, or a related engineering discipline. 6+ months of hands-on experience in layout design, with demonstrated skills gained through internships, academic projects, coursework, or hands-on training.
- Proficiency with industry-standard layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or similar software.
- Advanced English level.
- Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).
- Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
- Master's degree in Electronics, Microelectronics Engineering, Computer Engineering, or a related engineering discipline. 1+ year of experience or familiarity with Very Large Scale Integration (VLSI) or Complementary Metal-Oxide-Semiconductor (CMOS) logic circuit design.
- Practical knowledge of Unix/Linux operating systems.
- Requirements listed would be obtained through a combination of relevant industry job experience, internship experience and/or schoolwork/classes/research.
- We invite you to bring your creativity and technical expertise to Intel, where you'll contribute to shaping the future of computing technologies.
- Your journey starts here-apply today and be part of Intel's innovation legacy.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
Opens intel.wd1.myworkdayjobs.com in a new tab
Specialisation
Open roles at Intel
732 positions
Job ID
/job/Mexico-Guadalajara/Atom-CPU-Layout-Design-Engineer_JR0287800-1
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — freeSimilar Other roles
Samsung Semiconductor
Staff Engineer, SRAM Circuit Design
San Jose, California, United States|Other
Samsung Semiconductor
Senior Manager, Memory Sales
San Jose, California, United States|Other
Micron Technology
CMP PROCESS ENGINEER
Taichung - Fab 16, Taiwan|Other
Micron Technology
Senior Manager, FE Central PQE (Deviation Management)
Fab 10A, Singapore|Other