Analog Circuit Design Engineer

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About This Role

  • Role Overview As an Integrated Voltage Regulator (IVR) Design Engineer, you will be responsible for the architecture, design, and implementation of high-performance power management solutions directly integrated onto advanced processors (CPUs, GPUs, or SoCs).
  • You will work at the intersection of Analog/Mixed-Signal IC design and Power Electronics to improve energy efficiency and performance in next-generation computing systems.
  • Key Responsibilities Circuit Architecture and Design: Develop and refine analog topologies such as Operational Amplifiers (Op-Amps), Bandgap References, Data Converters (ADC/DAC), and Phase-Locked Loops (PLLs).
  • Design and Simulation: Perform transistor-level design using industry-standard tools (like Cadence Virtuoso).
  • Conduct extensive Monte Carlo simulations, corner analysis, and noise analysis to ensure high yield and reliability.
  • Layout Oversight: Collaborate closely with layout engineers to guide critical placement and routing, focusing on matching, shielding, and minimizing parasitic capacitance/resistance.
  • Verification: Use SPICE-based simulators to verify circuit functionality against rigorous performance specifications (speed, power, gain, etc.).
  • Post-Silicon Characterization: Bench-test silicon prototypes in the lab to validate performance against pre-silicon models and debug hardware anomalies Qualifications: Required Technical Skills Transistor Fundamentals: Expert knowledge of MOSFET/BJT device physics, small-signal modeling, and aging effects.
  • EDA Tool Proficiency: Mastery of Cadence (Spectre/Virtuoso), Mentor Graphics, or Synopsys tool suites.
  • Signal Integrity: Deep understanding of thermal noise, jitter, crosstalk, and power supply rejection ratio (PSRR).
  • Mixed-Signal Flow: Familiarity with Verilog-A or Verilog-AMS for behavioral modeling of analog blocks.
  • Qualifications Education: BS, MS, or PhD in Electrical Engineering (EE) with a concentration in Analog IC Design.
  • Experience: 3 - 7 years of experience in analog design (FinFET or planar CMOS nodes).
  • Analytical Mindset: Strong mathematical background for analyzing feedback systems and stability.

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Intel

India, Bangalore

Specialisation
Salary range
₹4-10 LPA to ₹40-75 LPA
Open roles at Intel
607 positions
Job ID
/job/India-Bangalore/Analog-Circuit-Design-Engineer_JR0287600

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