Advanced Packaging Integration and Simulation Intern

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About This Role

  • Intel Technology Research is advancing the future of AI and high-performance computing through innovative advanced packaging technologies and 3D heterogeneous integration.
  • Enabling novel system architecture, developing innovating process integration and establishing predictive physics-based simulation capabilities are critical for enabling complex large form factor packages with high-bandwidth interconnect.
  • As an Advanced Packaging Integration and Simulation Intern, you will collaborate with leading researchers, process engineers, and modeling experts to develop and assess next-generation package architectures.
  • In this role, you will contribute to advanced Research and Dev across package integration, process flow definition and development, package modeling, yield and reliability assessment, and data analytics.
  • Key Responsibilities Support advanced packaging integration activities across wafer-level and package-level process flows, including wafer level process, 2.5D/3D integration, chiplet integration, and hybrid bonding-related modules.
  • Develop and execute Design of Experiments (DOE) to understand relationships among package architecture, process conditions, material behavior, and electrical/mechanical performance.
  • Build, calibrate, and apply simulation models to understand mechanical characteristics of packages, interconnect quality, thermal performance, etc.
  • Conduct thermo-mechanical simulations to evaluate material responses to temperature, stress, and package-level loading conditions.
  • Analyze inspection, process, and simulation data to identify root causes of integration challenges and recommend improvement paths.
  • Collaborate with cross-functional teams to optimize process flows for yield, reliability, manufacturability, and package performance.
  • Present findings through technical presentations and potential publications.
  • What You Will Gain : Gain hands-on exposure to advanced packaging integration challenges that enable future semiconductor technologies.
  • Learn how process integration, material selection, design rules, metrology, and package architecture interact to drive yield and reliability.
  • Develop practical experience with developing package simulation, model validation, and data-driven engineering analysis.
  • Gain exposure to advanced packaging architectures, including chiplets, 2.5D/3D integration, wafer-level assembly, and industrial leading interconnect technologies.
  • Participate in technical reviews, technology forums, and intern research presentations with experienced engineers and researchers.

Requirements

  • to be initially considered for this position.
  • Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates.
  • Experience listed below would be obtained through a combination of your schoolwork, classes, research, relevant previous job, and/or internship experiences.
  • Minimum Qualifications Candidate must be pursuing a PhD degree in Mechanical Engineering, Materials Science and Engineering, Electrical Engineering, Physics, Manufacturing Engineering, or a closely related STEM discipline Must be available to work full-time for the duration of a 3-month internship. 3+ months of academic or professional experience in one or more of the following areas: Experience with laboratory experimentation, engineering data analysis, or simulation/modeling workflows.
  • Experience in process integration or hands-on module development.
  • Programming or data analysis experience using Python, MATLAB, JMP, R, or similar tools.
  • Statistical analysis, DOE, or machine learning for engineering applications.
  • Preferred Qualifications 6+ months of academic or professional experience in one or more of the following areas: Advanced packaging, heterogeneous integration, wafer-level packaging, chiplet integration, or package assembly process development.
  • Thermal/mechanical/electrical modeling, finite element analysis preferred.
  • Failure analysis for semiconductor process and package assembly.
  • Join us at Intel to contribute to technological advancements while building a rewarding and impactful career.
  • Apply now to be a part of our extraordinary journey.

Benefits

  • We offer a total compensation package that ranks among the best in the industry.
  • It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel .
  • Annual Salary Range for jobs which could be performed in the US: $120,898.00-120,902.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
  • Our standard internship rates are based on your degree, location, and the job role.
  • Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process.

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