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What You'll Do
- To carry out design and layout of macros to support technology development.
- These devices could be active or passive devices used for characterization and reliability evaluation of a technology and span GF’s technology portfolio.
- To develop mini PDK decks to support R&D needs and provide technical support on PDK related questions.
- To provide input for Design Manuals and provide design support to members of the GF Labs teams.
- Collaborate with cross-functional teams (process, device, reliability, and other design enablement teams) to support testsite and MPW tapeouts needed for GF Labs projects.
- Create and maintain mini DRC decks to enable physical design rule evaluation and verification.
- Design and implement layout Design of Experiments (DoE) and develop test structures to validate design rules on silicon.
- Collaborate with experts across GF fabs to promote sharing and learning across fabs Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
- Required Qualifications: Bachelor’s Degree in Electrical Engineering, Microelectronics, Physics, Computer Science or equivalent. 8-10 years of work experience in semiconductor and/or EDA industries.
- Excellent technical problem-solving skills.
- Good attitude and interpersonal skills, tactful and works well in a team environment.
- Self-motivated, resourceful and shows initiative.
- Well organized and exhibits attention to detail.
- Travel - Up to 10% Fluency in English Language – written & verbal.
Nice to Have
- Good knowledge of electronic devices and semiconductor theory.
- Experience with CAD systems in Electronics (Cadence IC, Cadence OrCAD, Protel or similar); Experience with scripting languages (Perl, Tcl, Bash...) is a plus Exposure to Cadence IC (Virtuoso Layout, Schematic or Skill programming language) is a plus Previous experience with Unix/Linux systems is also a plus.
- Strong written and verbal communication skills.
- Strong planning & organizational skills.
- Expected Salary Range $118,000.00 - $210,000.00 The exact Salary will be determined based on qualifications, experience and location.
- If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information.
- Requests for accommodation will be considered on a case-by-case basis.
- Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.
- An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.
- GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential.
- GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people.
- Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.
- All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law
Sourced directly from GlobalFoundries’s career page
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Specialisation
Open roles at GlobalFoundries
524 positions
Job ID
/job/USA---New-York---Malta/SMTS-GF-Labs-Design-Enablement_JR-2600791
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