Signal Integrity Validation Internship (Summer 2025)

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Requirements

  • Currently enrolled in MSEE or equivalent.
  • Understanding of electro-magnetic principles for digital signal integrity Experience with signal integrity and electro-magnetic simulation/analysis tools such as Ansys HFSS and Designer, CST Microwave.
  • Experience with signal integrity measurements and debugging with TDR, VNA, pattern generators, error detectors and similar measurement equipment.
  • Understanding of frequency-domain and time-domain component and circuit characterization Understanding of test and calibration methods Experience in component design and application of high-speed cables/connectors into communications equipment is a plus.
  • Experience with Cadence tools, Matlab, ADS, and HSPICE is a plus.
  • The hourly range for California is $31.63 to $58.75 per hour.
  • You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
  • Please note that the hourly range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
  • Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
  • We’re doing work that matters.
  • Help us solve what others can’t.

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Specialisation
Open roles at Cadence Design Systems
638 positions
Job ID
/job/SAN-JOSE/Signal-Integrity-Validation-Internship--Summer-2025-_R48033-1

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