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What You'll Do
- Key contributor and driver of the R&D team that defines, models and analyzes high performance D2D SerDes IP microarchitecture, link budget and specifications Develop infrastructure to ensure robust product development, systems modeling analysis and testing Develop statistical and linear systems analysis of the link, model nonidealities and determine design specifications for circuit designers Develop and provide guidelines regarding signal integrity and power integrity to customers Support customer package/board design and debug as necessary Guide the package design team based on in-package D2D link channel analysis Generate technical specification, data sheets, and application notes Update R&D team with the latest standards developments, customer feedback and competitive analysis Position Requirements: PhD or M.S. in Electrical/Computer Engineering (or similar degree) 10+ years of experience working with high speed high performance SerDes and PHYs The ability to think through engineering systems end-to-end and identify bottlenecks and weak points.
- Strong mathematical skills, in particular relating to linear systems (Fourier analysis, filter theory, etc.) Deep understanding of high speed SerDes architecture Deep knowledge of communication systems fundamentals and wireline communications Strong coding skills for simulation and modelling, as well as data analysis Good experimental skills Good knowledge of signal processing (DSP) algorithms and architecture.
- Good working knowledge of physics of signal propagation Good working knowledge of basic circuits Experience generating systems or IBIS-AMI models Experience using system simulation tools, especially Matlab, Perl, and other scripting tools Demonstrated capacity to self-educate themselves to pick up new fields of expertise D2D link experience is preferred but not required Familiarity with emerging D2D standards such as UCIe is desired Strong debug and problem-solving skills Must have strong group presentation and leadership skills.
- Ability to clearly communicate technical challenges and status to customers, team members, senior management and executives Familiarity with advanced technology nodes (7nm and below) is a plus Experience with 3D electromagnetic simulation tools is a plus The annual salary range for California is $178,500 to $331,500.
- You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
- Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
- Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
- Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
- We’re doing work that matters.
- Help us solve what others can’t.
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Specialisation
Salary range
₹4-10 LPA to ₹40-75 LPA
Open roles at Cadence Design Systems
658 positions
Job ID
/job/SAN-JOSE/Design-Engineering-Architect_R52908-1
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