PV Intern for Low Power Flow

What You'll Do

• Support Cadence low power flow development and validation efforts Develop and maintain comprehensive unit and flow test cases for the Innovus Digital Implementation System Create test suites for new features in Cadence's low power tools and solutions Requirements Master's student or outstanding undergraduate in EE/CS or related field Solid understanding of digital IC design; knowledge of static timing analysis (STA) is a strong plus Familiarity with Unix/Linux environment Scripting experience (TCL, Python, Perl, Shell) preferred Experience with AI/LLM tools (e.g., ChatGPT, Copilot, Claude) for productivity and automation is a plus Strong communication skills in both English and Chinese Self-motivated with good problem-solving abilities Commitment to a minimum 6-month internship We’re doing work that matters.
• Help us solve what others can’t.