Principal Product Engineer System Verification, Emulation

About This Role

• Independently drive Palladium hardware emulation engagements with customers, from initial deployment through advanced use-case enablement and ongoing optimization Own the technical relationship for assigned customers, driving successful adoption and long-term usage of emulation-based verification flows with minimal supervision Analyze complex customer verification environments and workflows to identify opportunities for improved scalability, performance, and productivity using hardware‑assisted verification Work closely with R&D teams to provide feedback based on real customer use cases, lead enablement and validation of new features/capabilities, and influence the product roadmap Develop and maintain high‑quality technical collateral, reference flows, and examples for both customer engagements and internal enablement Collaborate with field, support, and R&D teams to reproduce, debug, and resolve complex customer‑reported issues, providing clear technical root‑cause analysis and recommendations Act as a technical mentor and subject‑matter expert within the product engineering organization, sharing best practices and lessons learned across engagement Requirements: Bachelor’s degree with a minimum of 7 years of experience or Master’s degree in Electrical Engineering with a minimum of 5 years of experience OR PhD with a minimum of 1 year of experience 6-8 years of hands-on experience in RTL verification, with exposure to hardware assisted verification (emulation or prototyping) Demonstrated ability to drive customer engagements independently (requirements discovery, technical execution, issue resolution, and stakeholder communication) Strong fundamentals in digital logic design and RTL development using Verilog/SystemVerilog Experience with simulation‑based verification methodologies, testbench development, and debug Working knowledge of Linux-based development environments and common EDA workflows Proficiency in C/C++ and Python for modeling, automation, and analysis Strong analytical, problem-solving, and root-cause analysis skills Effective written and verbal communication skills in English, with the ability to collaborate across multiple teams Nice to Have: Course or project work with FPGA based designs and verification Additional Job Details: Employment category: CLT Employment term: 40 hours/week.
• Competitive benefits.
• Location: San Jose, CA.
• Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems.
• We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play.
• Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments.
• For more information, access http://www.cadence.com The annual salary range for California is $136,500 to $253,500.
• You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
• Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
• Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
• Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
• We’re doing work that matters.
• Help us solve what others can’t.