Principal Product Engineer

Nice to Have

• Requires a MS in Electrical Engineering or ECE with focus on VLSI with two or more years of relevant industrial experience Experience in design and EDA with an emphasis on Cadence tools of Synthesis, Physical Design & timing closure at 20nm or below nodes Prior Designer, Product Engineering or Application Engineering experience in digital implementation, especially synthesis Understand industry challenges in digital implementation & sign off domain with exposure to 28nm & below foundry process nodes Industry experience with EDA tools in the IC digital implementation flow, preferably on Genus and Innovus Experience in Logic Design and Synthesis, Formal Verification, Low Power design, Physical Design and Timing Closure for block level and top level designs Automation skills using Perl, Tcl and shell scripting essential Knowledge of HDL – Verilog or SystemVerilog is preferred Must have logic design and timing closure skills Strong analysis skills required to debug complex timing closure, logical and physical design problems.
• Ability to perform root-cause analysis to suggest solutions to customers and provide feedback to R&D Proven track record and experience working in a fast paced environment The annual salary range for California is $136,500 to $253,500.
• You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
• Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
• Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
• Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
• We’re doing work that matters.
• Help us solve what others can’t.