Opens cadence.wd1.myworkdayjobs.com in a new tab
What You'll Do
- Designing and implementing protocol functionality in AMBA AVIP Developing and debugging BFMs, transactors, and associated software interfaces Ensuring correctness, performance, and scalability in emulation and acceleration flows Supporting customer issues, reproducing problems, and delivering fixes Job Qualifications: Strong fundamentals in digital design, computer architecture, and system‑level verification Experience with hardware description languages (SystemVerilog/Verilog) and/or C/C++ Understanding of standard interconnect and bus architectures (e.g., AMBA, UFS/Unipro/MPhy) Familiarity with emulation, acceleration, or hybrid verification flows is a strong plus Good debugging skills using waveforms, logs, and protocol analyzers Ability to work across hardware and software boundaries We’re doing work that matters.
- Help us solve what others can’t.
Sourced directly from Cadence Design Systems’s career page
Your application goes straight to Cadence Design Systems.
Opens cadence.wd1.myworkdayjobs.com in a new tab
Specialisation
Open roles at Cadence Design Systems
587 positions
Job ID
/job/GYEONGGI-DO-Seoul/Lead-Software-Engineer_R54079
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — freeSimilar Other roles
Micron Technology
RDA.Metrology Equipment Maintenance Shift Engineer
Miaoli - Tongluo, Taiwan|Other
Micron Technology
Senior Engineer, EDG Validation
Hyderabad - Phoenix Aquila, India|Other
Micron Technology
Design engineer
Hyderabad - Phoenix Aquila, India|Other
KLA Corporation
Product Marketing Manager
Migdal Ha'emek, Israel|Other