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What You'll Do

  • Designing and implementing protocol functionality in AMBA AVIP Developing and debugging BFMs, transactors, and associated software interfaces Ensuring correctness, performance, and scalability in emulation and acceleration flows Supporting customer issues, reproducing problems, and delivering fixes Job Qualifications: Strong fundamentals in digital design, computer architecture, and system‑level verification Experience with hardware description languages (SystemVerilog/Verilog) and/or C/C++ Understanding of standard interconnect and bus architectures (e.g., AMBA, UFS/Unipro/MPhy) Familiarity with emulation, acceleration, or hybrid verification flows is a strong plus Good debugging skills using waveforms, logs, and protocol analyzers Ability to work across hardware and software boundaries We’re doing work that matters.
  • Help us solve what others can’t.

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Cadence Design Systems

GYEONGGI-DO (Seoul)

Specialisation
Open roles at Cadence Design Systems
658 positions
Job ID
/job/GYEONGGI-DO-Seoul/Lead-Software-Engineer_R54079

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