Lead Design Engineer

Overview

• At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
• Proficient in Verilog coding and RTL design, data path designs, 2.
• Knowledge of RTL checks ex- LINT, SDC, CDC 3.
• Familiar with synthesis flow and timing constraints 4.
• Experience in writing Verilog testbench and running simulations.
• Familiar with any of the interface Protocols like UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display We’re doing work that matters.
• Help us solve what others can’t.