Staff Semiconductor Power Engineer (ICB4)

USA-CA San Jose Innovation Drive Other

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About This Role

Role Overview: We are seeking a highly skilled and motivated Staff Power Engineer to join our semiconductor design team.
In this role, you will be the primary driver for our power strategies, taking full ownership of end-to-end power definition, analysis, and optimization for our next-generation chips.
You will work cross-functionally with architecture, RTL design, physical design, and software teams to ensure our products meet strict power and thermal envelopes.
Key Responsibilities: End-to-End Ownership: Lead the complete power lifecycle for complex SoCs, from early architectural power definition and budgeting to final silicon validation.
Power Analysis: Conduct rigorous dynamic and leakage power analysis at various design stages (RTL, Gate-level, Post-layout) using industry-standard EDA tools.
Methodology Development: Architect, develop, and maintain advanced power analysis flows, automation scripts, and methodologies to improve accuracy and turnaround time.
Reduction & Optimization: Identify power bottlenecks and drive active power reduction strategies (e.g., clock gating, power gating, dynamic voltage and frequency scaling) across micro-architecture, logic, and physical implementation phases.
Cross-Functional Collaboration: Partner with the physical design team on power grid (PDN) sign-off and IR/EM drop analysis, and work with systems teams to align on thermal and packaging constraints, including collaborating with the board design team to define power profiles and thermal maps.
Required Qualifications: Core Domain Expertise: Proven track record in semiconductor power definition, estimation, and optimization for complex SoCs or high-performance IPs.
EDA Tool Proficiency: Strong hands-on experience with industry-standard power analysis and sign-off tools (e.g., Synopsys Pt-PX / PrimePower, Ansys RedHawk, Cadence Joules, or PowerArtist).
Low-Power Design Knowledge: Deep understanding of modern low-power design intents and formats (UPF/CPF), CMOS device physics, and power reduction techniques.
AI-Assisted Scripting & Methodology: Proficiency in leveraging modern AI coding assistants to rapidly generate, debug, and optimize scripts (Python, Tcl, Perl) for workflow automation and data parsing, shifting focus from manual coding to AI-driven methodology development.
Educational Background: Bachelor’s (plus 8 years) or Master’s degree (plus 6 years) in Electrical Engineering, Computer Engineering, or a related field, with relevant industry experience commensurate with a mid-level/Staff role.
Communication Skills: Excellent analytical and problem-solving skills, with the ability to clearly communicate power trade-offs to cross-functional teams and leadership.

Nice to Have

Advanced Node Experience: Direct experience taping out designs in advanced semiconductor technology nodes (e.g., 7nm, 5nm, 3nm or below).
Thermal/IR Knowledge: Familiarity with thermal modeling, power delivery network (PDN) design, and voltage drop (IR/EM) mitigation.
Post-Silicon Validation: Experience correlating pre-silicon power estimates with post-silicon laboratory measurements.
Compensation and Benefits The annual base salary range for this position is USD 121,900.00 To USD 195,000.00 As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
The company follows all applicable laws for Paid Family Leave and other leaves of absence.
We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.