Staff Engineer

About This Role

• Broadcom Central Engineering team is looking for a Multi Skilled RTL, Verification engineer with DFT expertise.
• The Successful candidate will work in one or more domains of RTL, Verification, DFT for Complex Memory, IO subsystems, Hierarchical Blocks including BIST.
• It is a great opportunity and challenging role for the people who want to gain in-depth knowledge on end to end chip development flow with deeper expertise on RTL, Synth and Memory BIST Responsibilities RTL development and Verification for Digital subsystems, Memory Subsystems including BIST.
• Memory Digital Subsystems with Tessent/Embedded MBIST MBIST, ATPG, RSQ Verification and sign-off.
• Formal verification, Cross Clock Domain checks, Power/Timing sign off Verify complex Digital subsystems through OVM, UVM methodology, creating the Verification Suit Independently.
• Requirements Hands on Experience with RTL, Synthesis, Hands on experience in defining ICC/Synthesis constraints that meets timing closure needs Familiarity with DFT flows includes MBIST, ATPG, RSQ and Verification methodologies and best practices for the DFT signoff.
• Familiarity with Spyglass, LEC, CDC, and Synthesis tools DC Ultra, Fusion Compiler.
• We will also consider qualified applicants with arrest and conviction records consistent with local law.
• If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.