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About This Role

  • Broadcom is looking for a Silicon Design and Validation Engineer.
  • In this highly visible role, you will perform design, verification and validation of analog and mixed-signal high-speed building blocks.
  • You will collaborate with cross functional teams to launch ASIC products for data center networking.
  • Qualifications include: M.Sc. or PhD. in Electrical Engineering or Computer Engineering with 6+ years of experience in analog and mixed signal IP design, verification and validation for high-speed data converters, SerDes and data center networking and optical I/O.
  • Experience with design, validation and verification of analog front-end circuits, Trans-Impedance Amplifiers(TIA), PLLs, VCOs and clocking circuitry.
  • Knowledge of development methodologies, design flows including EDA integration, foundry PDK and associated collaterals.
  • Experience with bench test debug and validation of clock generation and timing IPs, data converters, TIAs, modulator drivers, clock and data recovery (CDR) and SerDes.
  • Validation, verification and characterization of various control loops such as PLLs, LDOs.
  • Deep understanding of signal integrity and power integrity for high-speed designs and experience with PI and SI measurements for correlation and debugging purposes.
  • Experience in test development, debug, and reporting.
  • Ability to work with Matlab or Python.
  • Experience in assessing design bugs and recommending workarounds.
  • Experience with measurement equipment such as DCO, oversampling/real time scopes, and network analyzers.
  • Experience with RF and high speed probing is a plus.
  • System level knowledge and deep understanding of current generation and next generation of optical and electrical high-speed I/Os Understanding of high-speed optical and electrical interconnect architectures and IEEE standards.
  • Strong analytical thinking and problem-solving skills with excellent attention to details.
  • It is a plus if the candidate has a good understanding of advanced packaging (2.5D / 3D) architectures.
  • Highly Desired Qualifications: Strong written and verbal communication skills, with the specific ability to speak to various technical and management levels.
  • Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results.
  • Excellent time and task management, and interpersonal skills.
  • Willingness to travel when required.
  • Additional Job Description: Compensation and Benefits The annual base salary range for this position is $120,000 - $192,000 As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
  • All subject to relevant plan documents and award agreements.
  • Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
  • The company follows all applicable laws for Paid Family Leave and other leaves of absence.
  • We will also consider qualified applicants with arrest and conviction records consistent with local law.
  • If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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Broadcom

USA-California-San Jose-1320 Ridder Park Drive

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/job/USA-California-San-Jose-1320-Ridder-Park-Drive/Silicon-Design-and-Validation-Engineer_R025787-1

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