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About This Role
- Responsibilities Include: Work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC).
- Drive tools and methodologies to achieve desired PPA metrics.
- Complete equivalence checks, STA, Timing closure and power optimization.
- Implement timing and functional ECOs.
- Apply Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous criteria for achieving Right-first time silicon.
- Qualifications Desired: Primary expertise in place and route and/or timing (constraints, STA) can be considered for this position.
- Proficient in design implementation activities both at block and SoC level.
- Well experienced in floor-planning, partitioning, placement, clock tree synthesis, route and physical verification and/ or constraints development, constraints validation, timing analysis and closure.
- Experience with formal verification, timing analysis and Eco implementation.
- Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime etc is highly desirable.
- Full chip tapeout experience based on 7nm and lower technologies is highly preferred.
- Hands on experience with timing analysis and place and route tools for ASIC/ SoC Design is a must.
- Additional Requirements: Good problem solver.
- Self starter who can work independently.
- Experienced in working in a global team and dynamic environment.
- Possess ability to learn and adapt to new tools and methodologies on the fly.
- Excellent communication skills.
- Education required: BS in Electrical Engineering/ Computer Engineering or related field and 12+ years of related experience; or an MS in Electrical Engineering/ Computer Engineering or related field and 10+ years of related experience.
- Additional Job Description: Compensation and Benefits The annual base salary range for this position is $127,100 - $226,000.
- This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
- Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
- The company follows all applicable laws for Paid Family Leave and other leaves of absence.
- We will also consider qualified applicants with arrest and conviction records consistent with local law.
- If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Sourced directly from Broadcom’s career page
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Specialisation
Salary range
₹5-11 LPA to ₹38-65 LPA
Open roles at Broadcom
398 positions
Job ID
/job/USA-CA-San-Jose-Innovation-Drive/Physical-Design-Engineer_R025345
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