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About This Role
- Broadcom’s CSG division is seeking candidate for a DFT lead position.
- The successful candidate will be responsible for leading most complex and cutting edge network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. .
- You will also drive/push state of the art in the areas of testability, debug and quality, in order to aggressively deliver low DPPM's, while optimizing the cost for test.
- Responsibilities Drive the test quality of the products from Design to Production Participate/contribute in silicon bring-up, characterization, and silicon test Define and implement various DFx features Requirements Knowledge of Testability techniques and features (SCAN, Built-in-Self-Tests, Loop-Backs etc.) covering digital logic domain, embedded memories and PHY/IO’s Scan flow development, ATPG pattern generation, verification and coverage analysis Experience working with Mentor/Siemens DFT Tessent tool for scan/MBIST/bscan/IJTAG insertion and verification Experience working with Cadence DFT tools (Modus and Genus) Well versed in JTAG/1500/1687 networks and BSDL, ICL and PDL knowledge Strong knowledge of logic & circuit design fundamentals is needed Working knowledge of TCL, perl Experience in implementation of MBIST for memories and knowledge of repair schemes, algorithms Experience or working knowledge of SERDES, Analog /mixed-signal DFT techniques (like IOBIST, loop-backs etc..) is a plus Experience in implementation of MBIST for memories and knowledge of repair schemes, algorithms is a must Post Silicon experience in Pattern conversion for Testers, Pattern Bring-up & Debug, Silicon Characterization etc. is a plus Experience or familiarity in back-end chip design, Timing, CDC flows is a plus Strong Pre/Post Silicon debugging, analytical and independent problem solving ability.
- Must be a team player with good verbal and written communication skills.
- Must be self-driven engineer with good project management and organizational skills to deliver high quality output in a timely manner.
- Experience : Bachelors and 8+ years of related experience Additional Job Description: Compensation and Benefits The annual base salary range for this position is $ 120,000 - $192,000. .
- This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
- Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
- The company follows all applicable laws for Paid Family Leave and other leaves of absence.
- We will also consider qualified applicants with arrest and conviction records consistent with local law.
- If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Sourced directly from Broadcom’s career page
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Salary range
₹5-10 LPA to ₹35-58 LPA
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398 positions
Job ID
/job/USA-CA-San-Jose-Innovation-Drive/DFT-Engineer_R024254
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