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About This Role
- The ASIC Product Division at Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs.
- The candidate will be joining a high performance design team responsible for state-of-the-art subsystem development to meet customer requirements.
What You'll Do
- Verification environment development using modern verification techniques (SystemVerilog and UVM) Designing verification components such as UVM agents, and behavioral models Implementing coverage and assertions using SystemVerilog Developing random and directed test cases against the specification Analyzing and debugging simulation failures, as well as analyzing coverage results Job Requirements: A Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent 12+ year’s relevant industry work experience.
- Experience in verifying designs at system level and block level.
- Fluent knowledge of RTL verification methodologies including SystemVerilog.
- Strong experience in ASIC design verification flows and DV methodologies Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.
- Strong and independent design debugging capability.
- Strong verbal and written communication skills.
- Must be comfortable working in a team environment with verification team and design team members.
- Demonstrated ability to analyze and resolve complex verification trade-off scenarios.
- Highly productive individual contributor with a demonstrated technical capability in system and sub-block level verification Must have legal authorization to work in the US The candidate should have expertise in some (or preferably all) of the following areas : Experience with hardware design and debug, C++/SystemC and other programming languages are a strong plus.
- Experience working with Emulators and FPGA based prototyping is a plus.
- Familiarity with overall chip design methodologies and tools Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred Compensation and Benefits The annual base salary range for this position is USD To USD As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
- All subject to relevant plan documents and award agreements.
- Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
- The company follows all applicable laws for Paid Family Leave and other leaves of absence.
- We will also consider qualified applicants with arrest and conviction records consistent with local law.
- If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Sourced directly from Broadcom’s career page
Your application goes straight to Broadcom.
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Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Broadcom
366 positions
Job ID
/job/USA-CA-San-Jose-Innovation-Drive/Design-Verification-Engineer_R027496
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