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About This Role
- Role Summary: Architecture and RTL implementation of high-speed datapaths and control logic.
- Focuses on high-throughput data movement and the integration of PCIe and Ethernet protocols with embedded micro-controllers.
- Core Responsibilities: Datapath Design: Architect and implement high-speed, low-latency datapaths and complex FSMs in (System)Verilog .
- Protocol Integration: Lead the design and integration of PCIe and Ethernet sub-systems.
- Controller Interfacing: Design interfaces between high-speed logic and embedded micro-controllers .
- Hardware Debug: Perform hands-on debug and performance tuning of PCIe/Ethernet traffic.
About This Role
- Compensation and Benefits The annual base salary range for this position is $108,000 - $192,000 As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
- All subject to relevant plan documents and award agreements.
- Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
- The company follows all applicable laws for Paid Family Leave and other leaves of absence.
- We will also consider qualified applicants with arrest and conviction records consistent with local law.
- If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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Job ID
/job/USA-TX-Austin---River-Place-B7/Design-Engineer_R025358
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