Senior Engineer, Digital Design Engineering
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What You'll Do
- DFT architecture definition Understand SoC architecture and test requirements Work very closely with the lead Product/Test engineering throughout the DFT definition phase to determine efficient ways to optimize test cost and achieve high test coverage.
- Drive DFT architecture SCAN – scan partition, compression, at-speed, IR and low power MBIST for memories JTAG boundary scan insertion Implementation Develop / Upgrade SCAN & MBIST Insertion flows Develop appropriate timing constraints for SCAN/MBIST modes and debug timing violations ATPG flow implementation catering to various fault models, test pattern generation SCAN , MBIST & BSCAN Pattern Simulation Solutions to test analog macros Post-Silicon bring-up/support Work with Evaluation/Test Engineering team to bring-up patterns on ATE Work on failure analysis as required Work with the Operation team on test cost and yield improvement Work closely with physical design team throughout the development cycle Requirements 4-8 years of industry experience in DFT domain.
- Must have experience in bringing atleast one or two products to successful production from scan insetion , ATPG and Gate level simulations.
- Hands-on experience working on post-silicon activities is desirable Good interpersonal and communication skills are critical for working, influencing and collaborating with product development groups Scripting skills in Python/TCL/C Prior experience of timing closure/physical design will be an added plus.
- For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S.
- Department of Commerce - Bureau of Industry and Security and/or the U.S.
- Department of State - Directorate of Defense Trade Controls.
- As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
- We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
- Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days
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Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
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Job ID
/job/India-Bangalore-Nova/Senior-Engineer--Digital-Design-Engineering_R262065
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