Opens analogdevices.wd1.myworkdayjobs.com in a new tab
What You'll Do
- Execute Full RTL-to-GDSII Flow : Own complete physical implementation, including synthesis, linting, full-chip/hierarchical floorplanning, place-and-route (P&R), clock tree synthesis (CTS), and timing/SI/power closure. [ Implement ECOs : Generate and execute functional and timing Engineering Change Orders (ECOs) late in the design cycle.
- Conduct Sign-Off Analysis : Perform Logical Equivalence Checking (LEC), parasitic extraction, Static Timing Analysis (STA), and Power/EM/IR-drop analysis to ensure robust, silicon-ready design performance.
- Drive Physical Verification : Lead Physical Design Verification (PDV) workflows to deliver DRC/LVS/ERC error-free layouts.
- Implement Low-Power Architectures : Execute UPF-driven low-power designs, perform in-rush current analysis, and deliver comprehensive low-power verification.
- Advance Flow Automation & AI Innovation : Develop and maintain TCL, Perl, and Shell scripts to automate design pipelines, evaluate emerging EDA tools, and integrate AI methodologies to accelerate the design cycle.
- Job Requirements Education: Master’s/bachelor's degree (ME/MTech/ME/BE/BTech) in Electrical, Electronics, or Computer Engineering.
- Experience: 7+ years of production-level physical design implementation experience (RTL2GDSII) on complex tape-outs using industry-leading EDA tools.
- Technical Depth: Proven expertise in advanced Synthesis/CDC/RDC/Linting/P&R/LEC/Timing/SI/Power closure flows and late-stage functional/timing ECO implementation.
- Low-Power Expertise: Hands on with UPF-driven low-power design methodologies, including in-rush current analysis and low-power verification.
- Automation & Innovation: Proficiency in scripting (Python, TCL, Perl, Shell) for automation, with an aptitude for leveraging AI methodologies to accelerate design cycles.
- Good Knowledge in DFT concepts.
- For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S.
- Department of Commerce - Bureau of Industry and Security and/or the U.S.
- Department of State - Directorate of Defense Trade Controls.
- As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
- We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
- Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days
Sourced directly from Analog Devices’s career page
Your application goes straight to Analog Devices.
Opens analogdevices.wd1.myworkdayjobs.com in a new tab
Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Analog Devices
891 positions
Job ID
/job/India-Bangalore-RMZ/Senior-Digital-Design-Engineer_R264658
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — freeSimilar RTL Design roles
Analog Devices
Senior Manager, Digital Design Engineering
China, Shanghai, Pudong, ZuChongzhi|RTL Design
GlobalFoundries
Sr Mgr/Dep Director ASIC Digital Design IP ENGINEERING
Santa Clara|RTL Design
GlobalFoundries
PMTS ASIC Digital Design IP ENGINEERING
Santa Clara|RTL Design
NXP Semiconductors
Junior Digital Design Engineer - MCU
Catania|RTL Design