Associate Engineer, Design Verification Engineering

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• Foundational understanding of digital logic and RTL design principles.
• Familiarity with SystemVerilog and/or Verilog.
• Basic knowledge of simulation‑based functional verification concepts.
• Exposure to Linux/UNIX development environments.
• Strong analytical, debugging, and problem‑solving skills.
• Effective written and verbal communication skills.
• Ability to work productively in a team‑oriented environment.
• Preferred Qualifications Coursework, internship, or project experience in digital ASIC or SoC verification.
• Awareness of UVM concepts, including sequences, drivers, and monitors.
• Introductory experience with SystemVerilog Assertions (SVA).
• Familiarity with functional and code coverage.
• Experience with scripting languages such as Python or Perl.
• Exposure to version control tools (e.g., Git, Perforce) and regression workflows.
• Scope and Impact Performs verification tasks for well‑defined digital blocks with guidance from senior engineers.
• Work is reviewed for technical quality, completeness, and adherence to process.
• Contributes to early detection of functional issues, supporting first‑pass silicon success.
• Primary impact is at the block or subsystem level.
• For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S.
• Department of Commerce - Bureau of Industry and Security and/or the U.S.
• Department of State - Directorate of Defense Trade Controls.
• As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
• We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
• Job Req Type: Graduate Job Required Travel: Yes, 10% of the time